40fcd3a3b328d941d7e670edc694fbb1448d29f4,scipy/signal/ltisys.py,,impulse,#Any#Any#Any#Any#,1285

Before Change


    if isinstance(system, lti):
        sys = system
    else:
        sys = lti(*system)
    if X0 is None:
        X = squeeze(sys.B)
    else:
        X = squeeze(sys.B + X0)

After Change



    
    if isinstance(system, lti):
        sys = system.to_ss()
    else:
        sys = lti(*system).to_ss()
    if X0 is None:
        X = squeeze(sys.B)
    else:
        X = squeeze(sys.B + X0)
Italian Trulli
In pattern: SUPERPATTERN

Frequency: 6

Non-data size: 5

Instances


Project Name: scipy/scipy
Commit Name: 40fcd3a3b328d941d7e670edc694fbb1448d29f4
Time: 2015-05-06
Author: befelix@ethz.ch
File Name: scipy/signal/ltisys.py
Class Name:
Method Name: impulse


Project Name: scipy/scipy
Commit Name: 40fcd3a3b328d941d7e670edc694fbb1448d29f4
Time: 2015-05-06
Author: befelix@ethz.ch
File Name: scipy/signal/ltisys.py
Class Name:
Method Name: step


Project Name: scipy/scipy
Commit Name: 40fcd3a3b328d941d7e670edc694fbb1448d29f4
Time: 2015-05-06
Author: befelix@ethz.ch
File Name: scipy/signal/ltisys.py
Class Name:
Method Name: impulse2


Project Name: scipy/scipy
Commit Name: 40fcd3a3b328d941d7e670edc694fbb1448d29f4
Time: 2015-05-06
Author: befelix@ethz.ch
File Name: scipy/signal/ltisys.py
Class Name:
Method Name: lsim2


Project Name: scipy/scipy
Commit Name: 40fcd3a3b328d941d7e670edc694fbb1448d29f4
Time: 2015-05-06
Author: befelix@ethz.ch
File Name: scipy/signal/ltisys.py
Class Name:
Method Name: step2


Project Name: scipy/scipy
Commit Name: 40fcd3a3b328d941d7e670edc694fbb1448d29f4
Time: 2015-05-06
Author: befelix@ethz.ch
File Name: scipy/signal/ltisys.py
Class Name:
Method Name: lsim